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atavrfbkit / evld001 ............... ................ ................. ................ ................. ............. user guide IXDN0036
atavrfbkit / evld001 user guide 1 7597a?avr?02/06 section 1 introduction ................ ................ ................. ................ ................. ......... 1-1 1.1 general description ..................................................................................1-2 1.2 ballast demonstrator features .................................................................1-3 section 2 ballast demonstrator device features.............. ................ .............. ............... .............. .............. ......... 2-5 2.1 atmel supported products ........................................................................2-5 2.2 ixys ? supported products .......................................................................2-5 section 3 microcontroller port pin assignments ......... ................ ................. ......... 3-7 section 4 ballast demonstrator operatio n .............. ................. ................ ............ 4-9 4.1 general requirements ..............................................................................4-9 4.2 circuit topology ........................................................................................4-9 4.3 startup and pfc description ........... .......................................................4-10 4.4 lamp operation description ...................................................................4-11 section 5 device design & application... ............... ................. ................ ............ 5-15 5.1 magnetics................................................................................................5-15 5.2 ixys ixtp02n50d depleti on mode mosfet used as current source ....5-15 5.3 ixys ixd611 half- bridge mosfet dr iver ............. ............ ............. .......5-15 5.4 ixys ixi859 charge pump regulator. ................ ................ ............. .......5-16 5.5 ixys ixtp3n50p polarhvtm n-chann el power mosfet ............ .......5-17 section 6 atpwmx demonstrator softwa re................. .............. .............. .......... 6-19 6.1 main_pwmx_fluo_demo.c .......................................................................6-20 6.2 pfc_ctrl.c .................................................................................................6-26 6.3 lamp_ctrl.c .............................................................................................6-30 section 7 conclusion ............... ................ ................ ................. ................ .......... 7-33 7.1 appendix 1: swiss dim .........................................................................7-33 7.2 appendix 2: capacitor coupled low voltage supply..............................7-34 7.3 appendix 3: pfc basics .........................................................................7-35 7.4 appendix 4: bill of material.....................................................................7-36 7.5 appendix 5: schematics..........................................................................7-39
atavrfbkit / evld001 user guide 1-1 7597a?avr?02/06 section 1 introduction efficient fluorescent lamps and magnetic balla sts have been the standard lighting fixture in commercial and industrial lighting for many years. several lamp types, rapid start, high output, and others are available for cost effective and special applications. but incandescent lamps, in spite of the poor light to power ratio typically one fourth of fluo- rescent, offer one feature - dimming - that hasn?t been avail able in fluorescent lamps until now. dimming allows the user to conserve electrical power under natural ambient light or create effects to enhance mood or image presentation projection for example. typical rapid start fluorescent lamps have tw o pins at each end with a filament across the pins. the lamp has argon gas under low pressure and a small amount of mercury in the phosphor coated glass tube. as an ac voltage is applied at each end and the fila- ments are heated, electrons ar e driven off the filaments th at collide with mercury atoms in the gas mixture. a mercury electron reache s a higher energy level then falls back to a normal state releasing a photon of ultraviolet (uv) waveleng th. this photon collides with both argon assisting ionization and the phos phor coated glass tube. high voltage and uv photons ionize the argon, increasing gas conduction and releasing more uv pho- tons. uv photons collide with the phosphor atom s increasing their el ectron energy state and releasing heat. phosphor electron state decreases and releases a visible light pho- ton. different phosphor and gas materials can modify some of the lamp characteristics.
introduction 1-2 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 figure 1-1. fluorescent tube composition since the argon conductivity increases and resistance across the lamp ends decreases as the gas becomes exci ted, an inductance (ballast) must be used to limit and control the gas current. in the past, an inductor could be designed to limit the current for a nar- row range of power voltage and frequency. a better method to control gas current is to vary an inductor?s volt-seconds to achieve t he desired lamp current and intensity. a vari- able frequency inverter operating from a dc bu s can do this. if the inductor is part of an r-l-c circuit, rapid start ignition currents, maximum intensity, and dimming currents are easily controlled depending on the driving frequency versus resonant frequency. a ballast should include a power factor co rrector (pfc) to keep the main current and voltage in phase with a very low distortion ov er a wide range of 90 to 265 vac 50/60 hz. with microcontroller control, economical remote analog or digital control of lamp func- tion and fault reporting are a reality. mor eover, adjusting the lamp power to correspond with human perceived light level is possible. an application specific microcontroller brings the designer the flexibility to incr ease performance and add features to his light- ing product. some of the possible features are described in detail below. the final design topology is shown in the block diagram of figure 3. now, a new way of dimming fluorescent lamps fills the incandescent/fluorescent feature gap plus adds many additional desirabl e features at a very reasonable cost.
introduction atavrfbkit / evld001 user guide 1-3 7597a?avr?02/06 1.1 general description fluorescent ballast topology usually include s line conditioning for ce and ul compli- ance, a power factor correctio n block including a boost conv erter to 380 v for universal input applications and a half bridge inverter. by varying the frequency of the inverter, the controller will preheat the filaments (high frequency), then ignite the tube (reducing the frequency). once the tube is lit, varying the frequency will dim the light. the atmel at90pwmx microcontroller can be prog rammed to perform all these functions. figure 1-2. ballast demonstrator board 1.2 ballast demonstrator features ? automatic microcontroller dimmable ballast ? universal input ? 90 to 265 vac 50/60 hz, 90 to 370 vdc ? power factor corrected (pfc) boost regulator ? power feedback for stable operation over line voltage range ? variable frequency half bridge inverter ? 18w, up to 2 type t8 lamps ? automatic dimmable single lamp operation ? automatic detection of swiss, dali, or 0 ? 10v dimming control ? very versatile power saving options with microcontroller design for most functions
atavrfbkit / evld001 user guide 2-5 7597a?avr?02/06 section 2 ballast demonstrator device features 2.1 atmel supported products at90pwmx microcontroller ? high speed comparator for pfc zero crossover detection ? high speed configurable pwm outputs for pfc and ? bridge inverter ? 6 analog inputs for a/d conversion, 2.56v reference level ? 3 digital inputs used for the dimming control input ? 3 high speed pwm outputs used for the pfc and ? bridge driver ? a fully differential a/d with programmable gain used for efficient current sensing ? soic 24 pin package ? low power consumption in standby mode 2.2 ixys ? supported products ixi859 charge pump with voltage regulator and mosfet driver ? 3.3v regulator with undervoltage lockout ? converts pfc energy to regulated 15vdc ? low propagation delay driver with 15v out and 3v input for pfc fet gate ixtp3n50p mosfet ? 500v, low r ds (on) power mosfet, 3 used in design ixtp02n50d depletion mode mosfet ? 500v, 200ma, normally on, to-220 package and configured as current source
ballast demonstrator device features 2-6 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 ixd611s mosfet driver ? up to 600ma drive current ? ? bridge, high and low side driver in a single surface mount ic ? undervoltage lockout figure 2-1. ballast demonstrator block diagram uvlo 15v 3.3v regulators pfc driver ix859 pfc inductor pfc boost regulator driver driver 15v inverter decoupling capacitor resonating inductor and filament transformer 2 11 3 10 5 8 6 7 t4 ixd611 r28 ixtp3n50p q5 q4 bulk capacitor c9 c14 d4 q3 r2 q1 d2 d3 r9 & r13 r35 t1 ixtp02n50d r10 & r14 r39 11 2 10 3 56 7 c11 resonating capacitor t3 balance transformer and lamps r42 pfc output inverter high inverter low v_haversine v_bus v_lamp i_lamp pscout00/pd0 pscout20/pb0 pscout21/pb1 adc5/pb2 adc4/pb7 adc4/pb7 amp0+/pb4 amp0-/pb3 pfc_zcd acmp0/pd7 at90pwx isolated dali isolated 0-10v swiss dimming control dali_tx dali_rx swiss_ctrl zero_ten_v switch_0_10 txd/dali/pd3 rxd/dali/pd4 pe1 adc7/pb6 pe2 8 12 1
atavrfbkit / evld001 user guide 3-7 7597a?avr?02/06 section 3 microcontroller port pin assignments pd0 pcout00 pfc_output - to ixi859 fet driver input pd1 pscin0 dual_lamp - dual lamp detection pd3 txd/dali dali_tx - dali transmit line pd4 rxd/dali dali_rx - dali receive line pd5 adc2 lamp_eol - not supported in hardware or software pd6 adc3 v_lamp - rectified lamp voltage sense, missing lamp, open or shorted filament, preheat, ignition & run. pd7 acmp0 pfc_zcd - comparator for pfc zero current crossing sense pb0 pscout20 inverter_l - low side ? bridge driver output pb1 pscout21 inverter_h - high side ? bridge driver output pb2 adc5 v_bus - 380vdc bus voltage sense for regulation. pb3 amp0- gnd - diff amp - a/d, 1 ohm bus current shunt resistor pb4 amp0+ i_lamp - diff amp + a/d pb5 adc6 temperature - ambient temperature in lamp housing pb6 adc7 zero_ten_v - 0 to 10v control input pb7 adc4 v_haversine - haversine input sense. pe0 rst# reset - reset pin fo r zero crossing detector pe1 pe1 swiss_ctrl - swiss control input pe2 adc0 switch_0_10 - switch on/off for 0-10v interface
3-8 atavrfbkit / evld0 01 user guide 7597a?avr?02/06
atavrfbkit / evld001 user guide 4-9 7597a?avr?02/06 section 4 ballast demonstrator operation 4.1 general requirements ? constant power as determined by dali or analog power setting 380 volt dc bus as provided by a power factor correcting boost regulator (pfc) 100% to 2% dimming setting ? one or two lamps, type t8 of any characteristics ballast to compen sate automatically hardware is capable of up to 40w per lamp ? line voltage of 90 to 265 vac, 50 or 60 hz ? control method dali power control ? auto recognition of control means 0-10 volt power control ? auto recognition of control means one touch ?swiss? dimming 100% on after ignition then dim to the last or current programmed value, if any. 4.2 circuit topology input filter with variator for noise suppression and protection. pfc / boost circuit including ixi859 mosfet driver megaballast microcontroller 24 pin soic ? bridge driver ? bridge power mosfet stage for up to 2 lamps voltage driven filaments for wider lamp variety and better stability under all conditions 380vdc bus voltage after the pfc boost
ballast demonstrator operation 4-10 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 4.3 startup and pfc description upon application of main power, the micontro ller does not drive the pfc mosfet q3. the c9 capacitor is charged to the peak line voltage. the depletion fet q1 and the zener diode provide a dc voltage (uvlo) with enough current to supply the control part of the ballast. as soon as the microcontroller request the ballast to start, the pfc is started according to the following sequence. microcontroller checks that the dc bus voltage is 0.9 times the haversine peak and the under voltage lockout (uvlo) requirements are met, a series of fixed width soft-start pulses are sent to the pfc mosfet (q3) at 10 s at a 20 khz rate. at very low load currents the bus voltage should rise to 380v. if the bus rises to 410 vdc all pfc pulses stop. as the 380v drops, the zero crossing detector pd7 starts to sense a zero crossing from the pfc transformer second- ary. a 380v dc bus and a zero crossing event starts the pfc control loop. checks are made for the presence of the rectified power (haversine) and bus voltage throughout normal operation. mains sense at pb7 < 0.848 (90 vac) or > 2.497 (265 vac) peak faults the pfc to off, turns off th e pfc mosfet (q3) an d initiates a restart. the control consists of measuring the error between vbus and 380v (2.27v at pb2) to determine the pfc drive pulse width (pw). the pw is proportional to the error, and has to be constant over a complete half period. the update is done each time the haversine reaches zero. the maximum curent the pfc mosfet (q3) can sustain is 4.5a. the relation between pw and and the peak current in pfc mosfet (q3) is: pw = t = l x ipk / vhaversine_max with l at 700 h and ipk at 4.5a, pwmax = 8.5 s at high line (265 vrms). with l at 700 h and ipk at 4.5a, pwmax = 24.7 s at high line (90 vrms). this also effectively limits the fet dissipation under upset conditions. under normal operation, a pulse width maximum of 25 s is allowed for a maximum bus voltage error with the high line limitation. regulation of 1% of the vbus is achieved with this control scheme. after the pfc fet on pulse, the pfc inductor flyback boosts the voltage through the pfc diode to the bulk filter capacitor. the boost current decays as measured by the inductor secondary. after the current goes to zero, the next pulse is started. this ensures operation in a critical conduction bo ost mode. the current zero crossing detec- tion of pd7 sets the pfc off time. this of f time is effectively proportional to the haversine amplitude with the lowest pfc frequency occurring at the haversine crest and the highest frequency at the haversine ze ro. because of the haversine voltage and di=v*dt/l, the mains current envelope should follow the voltage for near unity power fac- tor. this assumes a nearly constant error (d i) of the 380 vdc bus over each haversine period.
ballast demonstrator operation atavrfbkit / evld001 user guide 4-11 7597a?avr?02/06 the pfc on time is modifi ed proportionally to the error between 380v and the actual value of the bus. in case the vbus reaches the overshoot value of 410v the pulse is reduced to 0. this control loop will determin e the regulation re sponse to ripple current on the 380v bulk filter cap and the loads for a sp ecific application design requirements. 4.3.1 system sequential step description main voltage applied. undervoltage lockout (uvlo) released. ixi859 voltage regulator supplies 3.3v to microcontroller. power microcontroller on in low current standby mode. disable ? bridge drive output pb0 & pb1 disable pd5 comparator (not implemented). pb7, scaled haversine voltage must be >0.848 vmin (90vac) & <2.497 (265vac) vmax (haversine peak) for the pfc to start. -check ac line condition every 200 ms maximum (10 cycles of 50 hz). -if the check fails, halt pd0, pb0, pb1 and set line vo ltage alarm high or low. do not restart until line within specs to protect pfc. pd0 soft start pfc with 10 s pulses at 50 s period for 800 s. monitor comparator at pd7 for change 1 to 0 indicating a zero crossing of the pfc inductor secondary voltage. this occurs after the 10 s start pulse burst. if no pd7 change and after 800 s halt pd0, wait 1 second and provide pd0 with 10 s pulses for 800 s. try 10 times and if no crossing, set pfc alarm. after pd7 comparator transition and 380vdc (2.368v at pb2), enable pfc control loop. -set pb2 (380vdc sense) setpoint to 2.368v with deadband. -if pb2 > 2.50v then inhibit pd0 pulse. -if pb2 = < 2.368v then use the control loop to establish the pd0 pfc pulse width. limit pulse width to 25us or as determined by the haversine peak voltage. after pd0 pfc pulse, wait until pd0 = 0 & pd7 = 0 (pd0 off time) then enable pd0 pulse according to table of error from setpoint. -if pb2 (380v sense) > a/d 255 = overshoot. when pb7 < 0.100v, limit pd0 minimum to 5 s to reduce distortion at havers- ine zero crossover. 4.4 lamp operation description t4 primary and c11 form a serial resonant circuit driven by the output half bridge. since the output is between 380v and 0v, dc isol ation is provided by c14 to drive the lamp circuit with ac. the lamp is placed across the resonating capacitor c11. the lamp fila- ments are driven by windings on t1 secondaries to about 3vrms so that the resonating inductor current provides the starting lamp filament current.
ballast demonstrator operation 4-12 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 initially, the lamp is started at a frequency well above resonance at 80khz before ramp- ing down to 55khz for ignition. 80khz prov ides a lagging power factor where most of the drive voltage appears across the inducto r. a smaller voltage appears across the res- onating capacitor and the lamps. however with 1 mh gapped inductance, there is sufficient inductor curren t to heat the filaments. for lamp ignition, the frequency is reduced from 80 khz to 40 khz at 30 khz/sec towards resonance causing the lamp voltage to rise to about 340v peak. ignition occurs at about 40khz for a 18w t8 lamp. the plasma established in the lamp presents a resistive load across the re sonating capacitor thereby r educing the voltage across the capacitor and shifting the reactive power in the bridge circuit to resistive power in the lamp. a further reduction in frequency to 32khz at 30khz/sec establishes maximum bright- ness as the resonant circuit now has a leading (capacitive) power factor causing more voltage and current (approx. 360 vpeak) across the capacitor and the lamp. dimming is accomplished by raising the drive frequency towards 100 khz. the lower lamp (capacitor) voltage c aused by changing from a leadi ng to a lagging (inductive) power factor and the resulting drop in lamp current causes lamp dimming. the visual perception of brightness is logarithmic with applied power and must be taken into account in the control method scheme. 4.4.1 single lamp operation single lamp operation can be detected from the 380vdc bus current through a 1 ohm sense resistor sensed by the differentia l input pb3/pb4. the at90pwmx differential amplifier has the gain preset in the source code at 10. this scales the 200mv for two lamps to a reasonable a/d resolution. pb4 requires low pass filtering. through the 1 ohm sense resistor r28, v = i*r = 80 watts *1/380v = 210ma*1 = 210mv. at preheat, the current for one lamp is half that for tw o lamps. this current is also used to sense open filament condition or lamp removed under power condition. an abrupt change in the bus current is a good indicator of lamp condition that does not require a high fre- quency response or a minimal res ponse due to reactive currents. once single lamp condition is detected, the mini mum run frequency is determined by lamp current pb4 < 100mv. if the single lamp condition oc curs while running, as noted by a decrease in current of more than 20% from the preset level, increase the frequency until the pb4 = 90mv. if the pb4 increases to 120mv, assume the lamp has been replaced. increase the frequency to 80khz to restart the ignition process. this is neces- sary to preheat the new lamp filament to ensure that th e hot lamp will not ignite any sooner than the cold lamp, exceeding the balance transformer range. start the ignition sequence. with one cold lamp in parallel with one hot lamp, it may be necessary to restart several times to ge t both lamps to ignite. note that the lamp and resonant circuit use a common return ground separate from the rest of the circuit. the balla st demonstrator uses active power feedback of the sense voltage vs. drive frequency to meet power ob jectives. also note that the differential amplifier is connected across the current sense resistor r28 to ensure a kelvin connec- tion. layout of the amplifier + and ? is cr itical for fast noise free loop response.
ballast demonstrator operation atavrfbkit / evld001 user guide 4-13 7597a?avr?02/06 4.4.2 lamp sequential step description after pb2 (boost voltage at 380v) = > 2.380v start preheat enable pd6 rectified lamp voltage sense enable pb0 and pb1 ? bridge drive output pb0 & pb1 12.5 s total period (80 khz) 50% duty 180 out of phase. check pb4 > 20mv, then 2 lamps. if pb4 < 20mv assume a single lamp. if pb4 < 10mv assume an empty fixture = fault & shutdown. determine the lamp inte nsity control method dali (prese nce of data stream at pd4), swiss (presence of 50/60 hz modulated 0 ? 10v at pb6) or 0 - 10v (constant non-zero voltage) at pb6. 4.4.3 start and ignition sequential step description sweep pb0 and pb1 frequency down at 30khz/sec or 33 s/sec rate. stop sweep at 40khz or 25 s period (12.5 s pulses for each ? bridge fet) check pb4 > 100mv (2 lamps) or > 30mv (1 lamp) for proof of ignition. hold ignition frequency for 10ms. if no pd6 voltage, collapse to < 200mv for proof of ignition, increase frequency to 77khz for preheat for 1 second. repeat ignition sequence 6 times then if fails, set dali fail flag or shut down. disable if dimmed frequency > 60 khz. disable if single lamp. proceed to power setting command at 30khz/sec rate as established by external con- trol or if no internal control proceed to pb4 195mv at input terminals before gain (about 32khz) for 100% power. if swiss control, proceed to max power. the swiss continuous switch closure will cause progressive increase in frequency at 33khz per second. the exception for a single lamp will be minimum frequency for 97mv (39 watts) at pb4 for 100% brig htness. this is the default power for a single lamp with no dimming.
atavrfbkit / evld001 user guide 5-15 7597a?avr?02/06 section 5 device design & application 5.1 magnetics pfc ? power fact or correction without going into the derivations of t he formulas used, the inductor design is as follows: l = 1.4 * 90vac * 25 s = 700 h 4.5a peak the on time has been discussed earlier and the off time maximum will occur at high line condition at the peak of the haversine. a 16mm core was chosen for the recom- mended power density at 200mt and 50khz. 5.2 ixys ixtp02n50d depletion mode mosfet used as current source the ixys ixtp02n50d depletion mode mosfet is used in this circuit to provide power and a start-up voltage to the vcc pin of the ixi859 charge pump regulator. the ixtp02n50d acts as a current source and se lf regulates as the source voltage rises above the 15v zener voltage and causes the gate to become more negative than the source due to the voltage drop across the source resistor. enough energy is available from the current source circuit during the conduction angles to keep the ixi859 (u1) pin 1 greater than 14vdc as required to enable the under voltage lock out (uvlo) cir- cuitry in the ixi859. 5.3 ixys ixd611 half- bridge mosfet driver the ixd611 half bridge driver includes two independent high speed drivers capable of 600ma drive current at a supply voltage of 15v . the isolated high side driver can with- stand up to 650v on its output while mainta ining its supply voltage through a bootstrap diode configuration. in this ballast applicatio n, the ixd611 is used in a half bridge inverter circuit driving two ixys ixtp3n50p power mosfets. the inverter load con- sists of a serie resonant inductor and capa citor to power the lamps. filament power is also provided by the load circuit and is wound on the same core as the resonant induc- tor. pulse width modulation (pwm) is not used in this application, instead the power is varied and the dimming of the lamps is cont rolled through frequency variation. it is important to note that pulse overlap, which could lead to the destruction of the two mos-
device design & application 5-16 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 fets due to current shoot through, is prev ented via the input drive signals through the microcontroller. other features of the ixd611 driver include: ? wide supply voltage operation 10-35v ? matched propagation delay for both drivers ? undervoltage lockout protection ? latch up protected over entire operating range ? +/- 50v/ns dv/dt immunity 5.4 ixys ixi859 charge pump regulator the ixi859 charge pump regulator integrates three primary function s central to the pfc stage of the ballast demonstrator. first it includes a linear regulated supply voltage out- put, and in this application the linear regulator provides 3.3v to run the microcontroller. the second function is a gate drive buffer that switches an external power mosfet used to boost the pfc voltage to 380v. on ce the microcontroller is booted up and run- ning, it generates the input signal to driv e the pfc mosfet through the ixi859 gate drive buffer. finally, the third function prov ides two point regulated supply voltage for operating external devices. as a safety feature, the ixi859 includes an internal vcc clamp to prevent damage to itself due to over-voltage conditions. in general applications at start-up, an r-c combination is employed at the vcc supply pin that ramps up a trickle voltage to the vc c pin from a high voltage offline source. the value of r is large to protect the internal zener diode clamp and as a result, cannot sup- ply enough current to power the microcontroller on it?s own. c provides energy to boot the microcontroller. at a certain voltage level during the ramp up, the under voltage lock out point is reached and the ixi859 e nables itself. the internal voltage regulator that supplies the microcontroller is also ac tivated during this time. however, given the trickle charge nature of the vcc input voltage, the microcon troller must boot itself up and enable pfc operation to provide charge pump power to itself. this means that the r-c combination must be sized care fully so that the voltage present at the vcc pin does not collapse too quickly under load and causes th e uvlo circuitry to disable device opera- tion before the microcontroller can take over the charge pump operation. also note that there is an internal comparator that only releases charge pump operation when the vcc voltage drop below 12.85v. the charge pump is released and vcc voltage is pumped up to 13.15v at which time the internal comparator disables the charge pump. this results in a tightly regulated charge pump voltage. one problem with the r-c combination described above is that when a universal range is used at the vcc pin, 90-265vac, r mu st dissipate nine times the power, current squared function for power in r, over a three-fold increase of voltage from 90v at the low end to 265v on the high end. as an alte rnative and as used in the ballast demon- strator, the vcc pin is fed voltage by way of a constant current source as previously described in section 6.2. this circuit brings several advantages over the regular r-c usage. first we can reduce power consumed pr eviously by r and replace it with a circuit that can provide power at startup. it can also provide sufficient power to run the micro- controller unlike the r-c combination. this would be an advantage in the case that a
device design & application atavrfbkit / evld001 user guide 5-17 7597a?avr?02/06 standby mode is desired. overall power consumption can be reduced by allowing the microcontroller to enter a low power mode an d shut down pfc operation without having to reboot the microcontroller. since the r-c combination cannot provide enough power to sustain microcontroller operation, the microcontroller must stay active running the pfc section to power itself. 5.5 ixys ixtp3n50p polarhv tm n- channel power mosfet the ixtp3n50p is a 3a 500v general purpose power mosfet that comes from the family of ixys polarhv mosfets. when comparing equivalent die sizes, polarht results in 50% lower r ds(on) , 40% lower r thjc (thermal resis- tance, junction to case), and 30% lower qg (gate charge) enabling a 30% - 40% die shrink, with the same or better performance verses the 1st generation power mosfets. within the ballast demonstrato r itself the ixtp3n50 serves two functions. the first of which is the power switching pair of devices in the half-bridge circuit that drives the lamps. while a third device serves in the main pfc circuit as the power switch that drives the pfc inductor.
atavrfbkit / evld001 user guide 6-19 7597a?avr?02/06 section 6 atpwmx demonstrator software this section of the application note describes the software architecture utilizing the fol- lowing source code files and related state machines. main_pwmx_fluo_demo.c adc state machine command control state machine pfc_ctrl.c pfc state machine lamp_ctrl.c lamp state machine associated header files: ? main_pwmx_fluo_demo.h ? pfc_ctrl.h ? lamp_ctrl.h including the following peripherals: ? timer0, adc, amplifier, comparator0, psc0, psc2, pll, dali via eusart the application has been designed to work either with t he at910pw3 and 2. in order to operate ballast operate, three primary control systems should run simulta- neously. one for the pfc control, one for the lamp control, and one for the command control of the ballast.
atpwmx demonstr ator software 6-20 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 furthermore, in order to work properly the state machines require input data. the ana- log data is provided primarily by an auto running interrupt mode adc state machine. the complete software package for the applica tion is split into the functional blocks in the diagram shown below. while the variables are identified as follows. g_ global gv_ global volatile gs_ global static voltage and current variables are id entified by the following examples. g_v or g_i global - voltage/current gv_v or gv_i global volatile - voltage/current gs_v or gs_i global static - voltage/current figure 6-1. demo software architecture 6.1 main_pwmx_fluo_de mo.c this file executes all the peripheral initia lizations and then schedules the different con- trol tasks. the adc and the command control state machines are also included in this file. the adc machine is controlled via interrupts.
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-21 7597a?avr?02/06 6.1.1 adc state machine the adc state machine functional diagram is shown below: figure 6-2. adc state machine the different states are outlined below: adc_off the adc was previously off. this is the first conversion and is not necessarily valid. start the first v_haver sine_conv conversion. v_haversine_conv temperature_conv v_bus_conv zero_ten_volt_conv adc_off g_time_waiting_since_latest_temperature_conv >= time_to_wait_between_two_temperature_con v v_lamp_conv gv_lamp_on == 1 gv_lamp_on == 1 gv_request_lamp_off == 0 i_lamp_conv gv_lamp_on == 1 gv_request_lamp_off == 0 gs_i_lamp_number_of_conversions < 2
atpwmx demonstr ator software 6-22 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 v_haversine_conv get back the v_ha versine result. start the next v_bus_conv conversion. v_bus_conv get back the v_bus result. start the next zero_ten_volt_conv conversion. zero_ten_volt_conv get back the zero_ten_volt_result and make a slipper filter wi th 512 conversion results. start the v_haversine_conv, the tem perature_conv, or the v_lamp_conv conversion depending on g_time_waiting_since_latest_temperature_conv and gv_lamp_on . temperature_conv get back the temperature_result. start the v_haversine_conv or the v_ lamp_conv conversion depending on gv_lamp_on . v_lamp_conv get back the v_ lamp result. start the v_haversine or the i_lamp conversion depending on gv_lamp_on and gv_request_lamp_off . if a lamp off ( gv_request_lamp_off == 1) has been requested by the command control task or a lamp fault mode on lamp_ctrl.c file, the psc2 and the amplifier0 are switched off and the following variables are set in at the following values: ? gv_lamp_on = 0; ? gv_lamp_state = lamp_off; ? gv_pfc_state = shut_down_pfc_and_slow_down_uc_speed; then a v_haversine_conv co nversion is started. else an i_lamp_conv conversion is started.
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-23 7597a?avr?02/06 i_lamp_conv get back the i_lamp result and depending on gv_lamp_on and gv_request_lamp_off , start another i_lamp_conv conversion in order to increase the accuracy and resolu- tion of the i_lamp measurement then start another cycle beginning with a v_haversine_conv conversion. if a lamp off ( gv_request_lamp_off == 1) has been requested by the command control task or a lamp fault mode on lamp_ctrl.c f ile, the psc2 and the amplifier0 are switched off and the following va riables are set at the following values: ? gv_lamp_on = 0; ? gv_lamp_state = lamp_off; ? gv_pfc_state = shut_down_pfc_and_slow_down_uc_speed; then a v_haversine conv conversion is started. 6.1.2 adc state machine global variables 6.1.2.1 input variables which have an impact on adc state machine ? g_v_lamp_on is normally set only by the configure_lamp_preheat state of the lamp state machine in the lamp_ctrl.c file. ? gv_request_lamp_off can be set by the command control state machine in the case the user requests to switch the lamp off. 6.1.2.2 output variables which can impact the other state machines ? g_v_lamp_on which can be cleared during the v_lamp_conv or i_lamp_conv state in case the gv_request_lamp_off has been set by the command control state machine. ? gv_lamp_state within the lamp state machine in the lamp_ctrl.c file can be set to lamp_off during the v_lamp_conv or i_lamp_conv state. ? gv_pfc_state within the pfc state machine in th e pfc_ctrl.c file can be set to shut_down_pfc_and_slow_down_ uc_speed state during the v_lamp_conv or i_lamp_conv state. 6.1.3 miscellaneous the gv_lamp_on checks during v_lamp_conv and i_lamp_conv states are nor- mally useless because gv_lamp_on is reset only by the same states of the adc state machine. 6.1.4 command control state machine the command control state machine centraliz es the 0-10v, swiss, and dali controls in order to switch pfc operation on or off and to set the lamp control instructions given by the user. the command control state machine functional diagram is shown below:
atpwmx demonstr ator software 6-24 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 figure 6-3. control state machine the different states are outlined below: init_select_control_means the dali bus is initialized in order to be able to receive a dali message in case this bus is used as the control means for the ballast. in case a dali message arrives at once , g_control_means is set to use_dali_control, and the gv_control_state is set to dali_message_exploitation, otherwise gv_control_state is set to wait_for_first_command. init_select_control_means control_off wait_for_first_command zero_ten_volt_control swiss_control init_dali dali_message_exploitation wait_for_dali_tx_completed wait_for_dali_message set_dali_in_rx_mode no immediate dali message dali message pine2 = = 0 swiss command gv_request_lamp_off = = 1 during v_lamp_conv or i_lamp_conv in adc state machine in adc state machine dali message g_control_means = = use_zero_ten_volt_control g_control_means = = use_swiss_control g_control_means = = use_dali_control dali message no dali message dali expects an answer dali tx completed
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-25 7597a?avr?02/06 wait_for_first_command the three control means are scrutinized, and the first command caught sets the g_control_means variable according to the command received. then the command is applied to the corresponding command state machine. zero_ten_volt_control analog control with 0-10v laboratory supply. pine2 allows the lamp to be switched on and off. swiss_control read the input pin. analyze the touch dim command. set the control variable values corresponding to the user request. init_dali initialize the dali microcon troller peripheral and jump to set_dali_in_rx_mode. set_dali_in_rx_mode set the dali bus in rx mode and jump to the wait_for_dali_message state or to the dali_message_exploitation state in ca se a message had been received as soon as the dali was ready. wait_for_dali_message wait for a dali message, in the case one arrives, jump to the dali_message_exploi tation state. dali_message_exploitation analyze the dali message content and modify control variables according to the request. in case a request from the dali ma ster is expected, answer, and jump back to set_dali_in_rx_mode state in order to wait for the next command, or jump to the wait_for_dali_tx_completed state in case the tx is not completed. wait_for_dali_ tx_completed stay in this state until the dali transmissi on is completed. as soon as the transmission is done, jump to set_dali_in_rx_mode in order to reinitialize the dali bus for the next message. notes: 1. control state machine global variables
atpwmx demonstr ator software 6-26 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 6.1.4.1 input variables which have an impact on the control state machine: ? none 6.1.4.2 output variables which can impact other state machines ? gv_pfc_state is set from pfc_off state to init_pfc_haversine_check state on the pfc state machine in the pfc_ctrl.c file when the user requests the lamp to switch on. ? gv_request_lamp_off is set by the control state machine. 6.2 pfc_ctrl.c this file executes the pfc state machine according to the scheduler in the main_pwmx_fluo_demo.c file. 6.2.1 pfc state machine the pfc state machine functional diagram is shown below:
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-27 7597a?avr?02/06 figure 6-4. pfc state machine init_pfc_haversine_check pfc_control_loop pfc_delay_for_next_soft_start start_pfc_control_loop pfc_soft_start start_pfc_soft_start configure_pfc_soft_start haversine_check pfc_haversine_check g_pfc_time_since_previous_timer_reset < = haversine_min_check_time haversine_peak_min < = gs_v_haversine_peak < = haversine_peak_max (0.95 * gs_v_haversine_peak) < = gv_v_bus < = v_bus_set_point gs_pfc_soft_start_tries < = pfc_start_max_tries pfc_problem gvs_zcd_occures get_v_bus() > = v_bus_overshoot gvs_pfc_soft_start_shots < = pfc_max_start_shots gs_multiplier_pfc_time_since_previous_timer_reset > = delay_multiplier_for_next_pfc_soft_start set_microcontroller_nominal_speed shut_down_pfc_and_slow_down_uc_speed pfc_off transition request on control state machine gv_request_lamp_off = = 1 during v_lamp_conv or i_lamp_conv in adc state machine in adc state machine
atpwmx demonstr ator software 6-28 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 the different states are outlined below: pfc_off nothing happen, the exit from this state is requested by the command control state machine in the main_pw mx_fluo_demo.c file. init_pfc_haversine_check initialize the control values of the pfc. then jump to the haversine_check state. haversine_check measure the ha versine peak voltage during haversine_min_check_time. then jump to the pfc_ haversine_check state. pfc_haversine_check pfc haversine peak must be between haversine_peak_min and haversine_peak_max (9 0vac and 265vac). if the haversine value is ok, set the max pulse width allowed and jump to the configure_pfc_soft_start state. else go back to init_pfc_haversine_check state. configure_pfc_soft_start configures the peripherals psc0 and comparator0 to soft start the pfc. then jump to start_pfc_soft_start. start_pfc_soft_start check that the soft start has been tried less than pfc_start_max_tries if ok then start psc0 and ju mp to pfc_soft_start state. else immediately jump to the pfc_problem state. pfc_soft_start the pfc soft start consists of pf c_max_start_shots pulses configured by pfc_soft_start_ configuration. if a zero crossing detection appears, ju mp to the start_pfc_ control_loop state else go to init_pfc_haversine_check, pfc_delay_for_next_pfc_soft_start, or pfc_problem state depending on the different conditions detailed in the pfc diagram.
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-29 7597a?avr?02/06 pfc_delay_for_next_pfc_soft_start in case the soft start fail s, the software has to wait delay_for_next_pfc_soft_start*de lay_multiplier_for_next_pfc_s oft_start, before trying a new soft start by going back to the start_ pfc_soft_start state. start_pfc_control_loop a zero crossing detection occurs so the pfc is now started, and the pfc can be config- ured to autoretrigg mode. the power will then be suffici ent to set the micr ocontroller at its nominal speed on the next set_microco ntroller_nominal_speed state. set_microcontroll er_nominal_speed the pfc is now running, so the microcontroller can now run at its full speed and the lamp can be switched on. then the gv_pfc_state is set to pfc_control_loop. th is directly impacts the lamp state machine which goes from a lamp_off state to a configure_lamp_preheat state. pfc_control_loop pfc is now running... this is the normal pfc loop control. in the case g_v_request_lamp_off is equal to 1 during a v_lamp or an i_lamp state of the adc state machine, the pfc will be shut down and the microcontrollers speed will be decreased in order to reduce power consumption in the new shut_down_pfc_and_slow_down_uc_speed state. shut_down_pfc_and_slow_down_uc_speed switch off the pfc. switch the microcontroller to a low power consumption mode. then go back to pfc_off state. 6.2.2 pfc state machine global variables 6.2.2.1 input variables which have an impact on pfc state machine: ? gv_pfc_state is set from pfc_off state to init_pfc_haversine_check state on the control state machine in main_pwmx_fluo_demo.c file when the user requests to switch the lamp on. ? gv_pfc_state is also set from pfc_control_loop state to shut_down_pfc_and_slow_down_uc_s peed state on the control state machine in main_pwmx_fluo_demo .c file when the user requests to switch the lamp off.
atpwmx demonstr ator software 6-30 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 6.2.2.2 output variables which can impact other state machines: ? gv_lamp_state is set from the lamp_off state to the configure_lamp_preheat state when the pfc is ready on the pfc_control_loop state. 6.3 lamp_ctrl.c this file executes the lamp state mach ine according to the scheduler in the main_pwmx_fluo_demo.c file. 6.3.1 lamp state machine the lamp state machine functional diagram is shown below: the different states are outlined below: figure 6-5. lamp state machine configure_lamp_preheat start_ignition lamp_preheat lamp_number_check g_lamp_time_multiplier >= lamp_preheat_time_multiplie r gs_lamp_check_number >= 15 lamp_off gv_pfc_state==pfc_control_loop gv_request_lamp_off ==1 during v_lamp_conv or i_lamp_conv in adc state machine in adc state machine g_inverter_comparison_values.ontime1 < inverter_xxx_lamp_ignition_half_period ignition get_i_lamp() >= one_lamp_minimum_ignition_current && et_v_lamp() < ignition_maximum_ignition_voltag e restart_preheat gs_lamp_ignition_tries < lamp_ignition_max_tries start_run_mode g_inverter_comparison_values.ontime1 >= inverter_run_half_period run_mode g_number_of_lamps > 0 too_many_lamp_ignition_tries no_lamp
atpwmx demonstr ator software atavrfbkit / evld001 user guide 6-31 7597a?avr?02/06 lamp_off nothing happens, the exiting of this state takes place as soon as the gv_pfc_state is set to pfc_control_loop. configure_lamp_preheat this is the first time the lamp is attempted to be started once the user has requested to switch it on. configure the amplifier0, which is used to measure the current, then configure the psc2 according to the definitions in the config.h file, and initialize all the lamp control variables. then jump to the lamp_preheat state. lamp_preheat starts the preheat sequence for lamp_preheat_time. then jump to the lamp_number_check state. lamp_number_check check the preheat current in order to know whether there is one or two lamps then jump to the start_ignition state. in the case there is no lamp, jump to the no_lamp state. start_ignition decrease the frequency from the init frequency down to inverter_ignition_half_period. then jump to the ignition state. ignition the ignition sequence consists of maintaining the ignition frequency determined by inverter_ignition_half_period for 10ms , and then checking if ignition occurs by measuring lamp current and voltage. in case it is.. . start_run_mode. in case it isn?t.. . restart_preheat. restart_preheat reconfigure the inverter with the restart parameters, then go to lamp_preheat. if ignition fails too many times... go to too_many_lamp_ignition_tries. start_run_mode increase the frequency from the init frequency, inve rter_ignition_half_period. then jump to the run_mode state.
atpwmx demonstr ator software 6-32 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 run_mode normal control loop to have the li ght in accordance with the gv_lamp_preset_current variable that is permanently updated in the command control state machine in the main_pwmx_fluo_demo.c file. the transition from the run_mode state to the lamp_off state is done in the adc state machine during the v_lamp_conv or i_lamp_conv state in the case the gv_request_lamp_off has been set by the command control task in the main_pwmx_fluo_demo.c file. too_many_lamp_ignition_tries if the ignition has failed lamp_ignition_max_ tries, a lamp switch off is requested by setting the gv_request_lamp_off and the lamp_off state takes effect during the next i_lamp_conv or the v_lamp_conv st ate of the adc stat e machine in the main_pwmx_fluo_demo.c file. no_lamp if no lamp is detected during the lamp_n umber_check, a lamp off is requested by setting the gv_request_lamp_off and the effective return to the lamp_off state takes place during the next i_lamp_conv or the v_lamp_conv state of the adc state machine in the main_pw mx_fluo_demo.c file. 6.3.2 lamp state machine global variables 6.3.2.1 input variables which have an impact on the lamp state machine ? the transition from lamp_off to pfc_control_loop is done when the gv_pfc_state is set to pfc_control_loop in pfc_ctrl.c file. ? the transition from the run_mode stat e to the lamp_off state is done in the adc machine during the v_lamp_conv or i_lamp_conv state in the case gv_request_lamp_off has been set by the command control task in the main_pwmx_fluo_demo.c file. 6.3.2.2 output variables which can impact other state machine ?a lamp off ( gv_request_lamp_off == 1 ) can be set by the lamp fault mode. the effect of this request takes place in the i_lamp_conv or v_lamp_conv in the adc state machine in the main_pwmx_fluo_demo.c file.
atavrfbkit / evld001 user guide 7-33 7597a?avr?02/06 section 7 conclusion the ballast demonstrator s hows that the at90pwmx micr ocontroller can control and regulate fluorescent lamps from any of the three (dali, 0 ? 10vdc & swiss) methods of dimming. it can automati cally sense the control method used thereby providing lamp controller manufacturer s with maximum flexibility in their design. one or more lamps can be controlled with flexibility an d precision. universal input and power factor control adds to the flexibility of the design with a minimal addition of more expensive active components. additionally, the programmability of the microcontro ller offers the lamp manufacturer the flexibility to add more design features than are shown here to enhance their market position. the ballast demonstrator, with it's many features, does not address all the pos- sibilities available to the lamp controller designer. 7.1 appendix 1: swiss dim the swissdim allows dimming control using a simple switch connected to the mains phase. swissdim operation the swissdim operat ion is as follows: with the lamp switched on: a short push switches the luminary off and stores the current light level. a long push gradually dims the light level. (change direction by briefly taking your finger off the button and pressing down again) with the lamp switched off: a short push switches the lamp on to the last light level used. (optional: use a soft start from minimum level to last level used) a longer push starts on the last light level used and gradually raises the light level to the required brightness.
conclusion 7-34 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 the lamps are dimmed for as long as the swit ch is pressed or until the minimum or max- imum dimmer setting is reached . 7.2 appendix 2: capacitor coupled low voltage supply small currents for the low voltage supply can be obtained from the ac line at low loss by means of capacitor coupling as shown in the figures below. to esti- mate the required size of the coupling capacitor, use the following relationships for current, charge, voltage and capacitance . 1.dq/dt = i dc figure 7-1. negative line half cycle figure 7-2. positive line half cycle 1.dv = 2vpk-vo-2v d 2.dq = cdv or c = dq/dv for example, to obtain 15 ma at 20 vdc from a 220 vrms 50 hz line: 1.dq/dt = (15 millijoules/sec)/(50 cycles/sec) or 0.3 millijoules / cycle. ac c1 v d v d c2 ?negative? line half -cycle: c1 charges to vpk - v d with polarity shown. vo ich1 i dc -v pk -v c1 + ac c1 v d v d c2 ?positive? line half -cycle: c1 charges to vpk - v d - vo with polarity shown. vo ich2 i dc +v pk + v c1 -
conclusion atavrfbkit / evld001 user guide 7-35 7597a?avr?02/06 2.over 1 cycle, the coupling capacitor (c1) will charge from ?220v x 1.4 to +220v x 1.4 ? 20v- v d . dv = 2*vpk-vo-2v d . dv ~= 600v. 3. the required c1 ~ 0.3 millijoules/600v or 0.5 uf in practice, c1 may have to be larger depending on the amount of ripple allowed by c2 and to account for component tolerances, mini mum voltage, and current in the regulator diode. c1 must be a non-polarized type with a voltage rating to withstand the peak line voltage including transients. a high quality film capacitor is recommended. 7.3 appendix 3: pfc basics the function of the pfc boost regulator is to produce a regulated dc supply voltage from a full wave rectified ac line voltage while maintaining a unity power factor load. this means that the current drawn from the line must be sinusoidal and in phase with the line voltage. the ballast pfc circuit accomplishes this by means of a boost converter operating (see figure 7-3) at critical conduction so that the current waveform is triangular (see figure 7-4). figure 7-3. pfc boost regulator the boost switch on time is maintained constant over each half cycle of the input volt- age sinusoid. therefore the peak current for eac h switching cycle is proportional to the line voltage which is nearly constant during ton. (ipk = vin x ton/l). since the average value of a triangular waveform is ? its peak value, the average current drawn is also proportional to the line voltage. figure 7-4. main voltage supply cutting pfc inductor pfc boost regulator power voltage vin vbus ion = (vin x t )/ l ioff pfc switch pfc driving main supply voltage ipeak = vin x ton / l imean = ipeak/2 ion ioff actual switching frequency is higher than shown
conclusion 7-36 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 7.4 appendix 4: bill of material figure 7-5. bill of materials 1
conclusion atavrfbkit / evld001 user guide 7-37 7597a?avr?02/06 figure 7-6. bill of materials 2
conclusion 7-38 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 figure 7-7. bill of materials 3
conclusion atavrfbkit / evld001 user guide 7-39 7597a?avr?02/06 7.5 appendix 5: schematics 5 5 4 4 3 3 2 2 1 1 d d c c b b a a boostvsup boostvsup boostvsup vdc 15v vcc vcc 15v vcc vcc vcc vcc vcc vcc vcc vcc isense gnd isense gnd isense gnd isense gnd isense gnd pb7adc4 pd7 acmp0 pd6 acd3 pb0 pb1 pd5 acmp2 pd0 hf_out pb5 adc6 pb4 amp0+ pb2 adc5 swiss boost10v title size document number rev date: sheet of c-2346-2 3.1 c 12 friday, september 23, 2005 ballast power section wl williamson & assoc title size document number rev date: sheet of c-2346-2 3.1 c 12 friday, september 23, 2005 ballast power section wl williamson & assoc title size document number rev date: sheet of c-2346-2 3.1 c 12 friday, september 23, 2005 ballast power section wl williamson & assoc lamp volt det. end of life dc & ac dac controlled window comp. haversine test resonant cap 400v bus test high fet current alarm current sense for power calc lamp missing det. lamp current det. 0.8 v rect. lamp voltage det. ignition, ramp, missing lamp det. analog input 1.25 to 2.75 normal 1.00 to 3.00 end of life t8 overtemp det. 0.264 v @ 80c 1.1v @ 25c 250 ua max. open filaments detected by 1/2 bridge current, one lamp jumper, & rect lamp voltage. option in code to accept one lamp w/dali flag or fault. preliminary 75-wyo222mcmbf0k df10sdi-nd plk1069-nd 75-f17724332000 p7186-nd 75-mkp1840410634 murs160dict-nd p5948-nd 22uf@450v ppc62kw-3jct-nd 62k 3w 505-m100.01/2000/5 notes: swiss control vbus to-220 2 1 3 close proximity tp-6 tp-8 tp-7 remove for single lamp op. remove for single lamp op. close to u2 3 amps peak 110/220-vin flourescent lamp flourescent lamp single lamp op voltage doubler -+ br1 600v -+ br1 600v 3 1 4 2 tp4 gnd tp4 gnd d18 ll4148-13 d18 ll4148-13 r30 460 k r30 460 k q4 ixtp3n50p q4 ixtp3n50p tp6 gatedr tp6 gatedr d4 1a-600v/fr d4 1a-600v/fr r20 400k r20 400k r10 1m r10 1m c11 .01uf 1500v film c11 .01uf 1500v film t4b transformer t4b transformer s 2 f 11 r15 22k r15 22k rv1 varistor265vac rv1 varistor265vac d8 mbrs140ct d8 mbrs140ct r13 1m r13 1m t1 lpfc t1 lpfc 1 3 6 5 10 8 tp9 gatelo tp9 gatelo r34 10k r34 10k r27 1k r27 1k c8 1uf c8 1uf d26 ll4148-13 d26 ll4148-13 d14 ll4148-13 d14 ll4148-13 r11 200 ohm 3 w r11 200 ohm 3 w r72 100 r72 100 t4e transformer t4e transformer s 6 f 7 c4 .1uf 600v c4 .1uf 600v d2 15v zener d2 15v zener c1 1800 pf 250vac c1 1800 pf 250vac d16 ll4148-13 d16 ll4148-13 c13 .1uf 600v c13 .1uf 600v c5 1 nf 600 v c5 1 nf 600 v d27 1a-600v/fr d27 1a-600v/fr r24 400k r24 400k q1 ixtp02n50d q1 ixtp02n50d 1 2 3 q3 ixtp3n50p q3 ixtp3n50p c17 5 nf c17 5 nf c19 .001uf c19 .001uf c6 47 uf c6 47 uf t4a transformer t4a transformer s 1 f 12 r22 200 ohm 3 w r22 200 ohm 3 w d28 ll4148-13 d28 ll4148-13 r25 1m r25 1m jp2 jumper jp2 jumper 1 2 d17 ll4148-13 d17 ll4148-13 c10 .02 uf c10 .02 uf d15 1a-600v/fr d15 1a-600v/fr d9 ll4148-13 d9 ll4148-13 r9 1m r9 1m tp3 15v tp3 15v d3 ll4148-13 d3 ll4148-13 r2 18k r2 18k r31 200k r31 200k r3 100 ohm r3 100 ohm d10 1a-600v/fr d10 1a-600v/fr d11 ll4148-13 d11 ll4148-13 c18 220nf 100v c18 220nf 100v t4d transformer t4d transformer s 5 f 8 r29 1.2k r29 1.2k tp8 gatehi tp8 gatehi c2 1nf c2 1nf d1 1a-600v/fr d1 1a-600v/fr q5 ixtp3n50p q5 ixtp3n50p r6 20k r6 20k d13 mbrs140ct d13 mbrs140ct r23 27 r23 27 t rt1 10k @ 25c t rt1 10k @ 25c 1 2 r12 27 r12 27 tp7 vcc tp7 vcc c3 250vac c3 250vac l1 cm choke l1 cm choke d7 ll4148-13 d7 ll4148-13 c9 50uf 475v c9 50uf 475v r19 27 r19 27 u1 ixi859s1 u1 ixi859s1 vsup 7 vout 2 vcc 1 gate 5 nc 3 in 4 gnd 6 vcap 8 c16 5 nf c16 5 nf r73 22 ohm r73 22 ohm d6 mbrs140ct d6 mbrs140ct t3 balance t3 balance 1 6 4 9 fl2 connector fl2 connector l1 1 l2 2 l3 3 l4 4 r21 200 ohm 3 w r21 200 ohm 3 w c12 .1uf c12 .1uf c14 .1 uf 600v film c14 .1 uf 600v film r5 1k r5 1k tp5 gnd tp5 gnd r26 1k r26 1k c7 10uf 25v c7 10uf 25v c21 220nf 100v c21 220nf 100v t4c transformer t4c transformer s 3 f 10 r28 1 /1% r28 1 /1% d12 ll4148-13 d12 ll4148-13 j1 connector j1 connector 1 2 3 4 c46 .022uf c46 .022uf r18 100k 1/4w r18 100k 1/4w r14 1m r14 1m d5 ll4148-13 d5 ll4148-13 c22 220nf 100v c22 220nf 100v r33 1.8 k r33 1.8 k c20 220nf 100v c20 220nf 100v c15 .1uf c15 .1uf r32 200k r32 200k fl1 connector fl1 connector l1 1 l2 2 l3 3 l4 4 u2 ixd611s1 u2 ixd611s1 ho 7 hin 2 vcc 1 lo 5 lin 3 com 4 vs 6 vb 8
conclusion 7-40 atavrfbkit / evld0 01 user guide 7597a?avr?02/06 5 5 4 4 3 3 2 2 1 1 d d c c b b a a pe2 pd4 pd4 adc7 pd4 adc7 pd3 pd3 pe2pe2 pe1 pe1 pe2 vcc vcc 10v 10v vcc vcc vcc vcc 10v 10v 10v 10v 10v vcc vcc vcc pd0 pb0 hf_out pb1 pb7adc4 pd5 acmp2 pd6 acd3 pb5 adc6 pb2 adc5 pb4 amp0+ swiss pd7 acmp0 boost10v title size document number rev date: sheet of c-2346-2 3.1 c 22 friday, september 23, 2005 wl williamson & assoc ballast control title size document number rev date: sheet of c-2346-2 3.1 c 22 friday, september 23, 2005 wl williamson & assoc ballast control title size document number rev date: sheet of c-2346-2 3.1 c 22 friday, september 23, 2005 wl williamson & assoc ballast control 4 to 8 ma @ 36 khz 10 vdc 5 ma dali must recognize the difference in pulse rate between the dali input, the vco output range and the much longer swiss control. preliminary bzx84c5v6sdict-nd bc857blt1osct-nd rh02dict-nd 1. dali 2. dali 3. 0 to 10 v control (+) 4. 0 to 10 v control (-) haversine 400 v det. current sense pfc zero 400 v detect current sense temp sense rectified lamp voltage end of life ckt 2nd secondary on pfc transformer single lamp operation pin jumper in throw away jumper for dual lamp spare if code recognizes single lamp pscin0 0 - 10 v freq. in locate in center of board rx tx r61 330 k r61 330 k r58 43 k r58 43 k r55 100 k r55 100 k c25 1uf c25 1uf + c29 10uf 25v + c29 10uf 25v r38 2.2k r38 2.2k d23 10v zener d23 10v zener c40 .1uf c40 .1uf + c41 10uf 25v + c41 10uf 25v c26 .1uf c26 .1uf r50 100 r50 100 c36 .1uf c36 .1uf -+ br2 0.5a 200v -+ br2 0.5a 200v 3 1 4 2 r40 10k r40 10k d20 ll4148-13 d20 ll4148-13 r64 100 ohm r64 100 ohm iso4 lda111s iso4 lda111s 1 2 5 4 6 c48 .01uf c48 .01uf j2 header6pin j2 header6pin pdo 1 vcc 2 sck 3 pdi 4 reset* 5 gnd 6 r36 100 k r36 100 k r47 10r r47 10r c27 .1uf c27 .1uf jp3 jumper jp3 jumper 1 2 r42 100 k r42 100 k c24 .1uf c24 .1uf c32 .1uf c32 .1uf r65 1 k r65 1 k q8 bc846bct q8 bc846bct 1 2 3 j5 con4 j5 con4 1 2 3 4 r45 100 k r45 100 k q9 pnp bce q9 pnp bce r69 100 k r69 100 k d25 ll4148-13 d25 ll4148-13 r43 4.7k r43 4.7k r67 43 k r67 43 k r71 10k r71 10k iso3 lda111s iso3 lda111s 1 2 5 4 6 r68 22 ohm r68 22 ohm r57 22 k r57 22 k r39 12k r39 12k r62 1m r62 1m c42 1 nf 600 v c42 1 nf 600 v c37 .01uf c37 .01uf d24 ll4148-13 d24 ll4148-13 r35 12k r35 12k r66 1 k r66 1 k q6 bc857b q6 bc857b iso2 lda111s iso2 lda111s 1 2 5 4 6 q10 pnp bce q10 pnp bce r41 4.7k r41 4.7k c45 47nf c45 47nf r59 4.7k r59 4.7k q7 bc846bct q7 bc846bct 1 2 3 j4 con2 j4 con2 1 2 c28 1nf c28 1nf tp1 testpt tp1 testpt c38 200 pf 1 kv c38 200 pf 1 kv c39 200 pf 1 kv c39 200 pf 1 kv u5 lmc555cm u5 lmc555cm vss 1 trig 2 output 3 reset 4 control 5 thres 6 disch 7 vdd 8 r49 470 r49 470 r60 100 k r60 100 k c43 200 pf 1 kv c43 200 pf 1 kv r54 22 k r54 22 k u3 at90pwm2 u3 at90pwm2 pdo (pscout00/xck/ss_a) 1 peo (reset/ocd) 2 pd1 (pscin0/clk) 3 pd2 (pscin2/oc1a/miso_a) 4 pd3 (txd/dali/oc0a/mosi_a) 5 vcc 6 gnd 7 pbo (pscout20) 8 pb1 (pscout21) 9 pe1 (oc0b/xtal1) 10 pe2 (adc0/xtal2) 11 pd4 (adc1/rxd/dali/cp1a/scl_a) 12 (adc2/acmp2) pd5 13 (adc3/acmpm/int0) pd6 14 (acmp0) pd7 15 (adc5/int1) pb2 16 avcc 17 agnd 18 aref 19 (amp-) pb3 20 (amp0+) pb4 21 (adc6/int2) pb5 22 (adc7/icp1b) pb6 23 (adc4/pscout01) pb7 24 r52 1k r52 1k r37 22 ohm r37 22 ohm r44 100 k r44 100 k d22 ll4148-13 d22 ll4148-13 r48 100 k r48 100 k c44 200 pf 1 kv c44 200 pf 1 kv c47 .1uf c47 .1uf tp2 testpt tp2 testpt r63 100 k r63 100 k d21 ll4148-13 d21 ll4148-13 r56 1.5k r56 1.5k j3 con2 j3 con2 1 2 c23 .1uf c23 .1uf r51 10k r51 10k d19 ll4148-13 d19 ll4148-13 c31 100pf c31 100pf c33 .1uf c33 .1uf r46 10k r46 10k c30 .1uf c30 .1uf c35 1uf c35 1uf iso1 lda111s iso1 lda111s 1 2 5 4 6 r53 100 k r53 100 k r70 0 ohm r70 0 ohm
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